1. Field of the Invention
The present invention generally relates to multi-level cell (MLC) flash memory, and more particularly to a method and system for obtaining a reference block in order to find the reference voltages for reading data from the MLC flash memory concerning both the cycle issue and retention issue.
2. Description of the Prior Art
Flash memory is a non-volatile solid state memory device that can be electrically erased and reprogrammed, and is a specific type of electrically erasable programmable read-only memory (EEPROM) device. Conventional flash memory stores a single bit of information in each memory cell such that each memory cell can be programmed to assume two possible states. The conventional flash memory is thus commonly referred to as single-level cell (SLC) flash memory or single-bit cell (SBC) flash memory. Modern flash memory is capable of storing two or more bits of information in each memory cell such that each memory cell can be programmed to assume more than two possible states. The modern flash memory is thus commonly referred to as multi-level cell (MLC) flash memory or multi-bit cell (MBC) flash memory.
In the MLC flash memory, data of different state are written to the flash memory (which is commonly referred as programming the flash memory) by storing different amount of charge in the floating gate of the flash memory. As the charge in the floating gate specifically determines the corresponding threshold voltage, the data can then be read from the MLC flash memory according to their different threshold voltage. Due to variations among the memory cells during the manufacture, operation or according to other factors, the threshold voltage of each state is not a constant value but a range. FIG. 1 shows a common distribution of the threshold voltage for a typical MLC flash memory (a three-bit cell flash memory is exemplified here). The entire voltage range (e.g., Vmin through Vmax) is divided into a number of regions (e.g., eight regions in the example), each region corresponding to one state. The number of cells of each threshold voltage is collected as illustrated. When the flash memory is being read, the threshold voltage of a cell is compared to reference voltages (e.g., V1, V2, etc. in the figure) to determine its state. For example, if the threshold voltage of a cell is within the reference voltages V4 and V5, the “011” state is thus determined and read from the flash memory.
The reference voltages for reading data from the traditional MLC flash memory are constant. In practice, however, the threshold voltage distribution (e.g., the distribution in FIG. 1) may probably change after the flash memory has been subjected to a predetermined number of program/erase cycles or/and a predetermined data retention time has elapsed. For example, as shown in FIG. 2 (in which only two states are concerned and shown for illustrative purpose), the initial distribution represented by the (dotted) curve 20 with reference voltage V4 may be suffered from retention issue after a long time not going through program/erase cycle, and therefore drifted downward to a shifted distribution represented by the (solid) curve 22 with a new reference voltage V4′. Similarly, the initial distribution 20 may drift downward to a shifted distribution due to the (program/erase) cycle issue. In either case, errors probably incur if the reference voltage V4 of the initial distribution 20 is still used (while the new reference voltage V4′ is unknown) to read data from the flash memory.
Although conventional techniques provide some schemes for finding the reference voltages, those techniques, however, cannot properly find the reference voltages concerning both the cycle and retention issues. Accordingly, a need has arisen to propose some novel schemes to obtain a proper reference basis on which the reference voltages for reading data from the MLC flash memory may be properly found concerning both the cycle issue and the retention issue.